Plenary
Session 1
|
Green
Future: IC Packaging Opportunities Abound
Ho-Ming Tong (ASE Group) |
Dr. Ho-Ming Tong is presently Chief R&D Officer & General
Manager of Group R&D, ASE Group. Prior to joining the ASE Group, Dr.
Tong had held several key management positions including General
Manager of the Semiconductor Division of the First International
Computer Group and Executive Vice President of Formosa Advanced
Technologies. Both companies specialized in memory IC assembly and
test pertaining to DRAM, Flash and SRAM. Dr. Tong also served
thirteen and a half years with IBM as Research Staff Member at
Thomas J. Watson Research Center on advanced package development for
mainframes and workstations, and as Senior Engineering Manager at
IBM��s East Fishkill Facility on advanced package and IC
developments. Dr. Tong was elected IEEE Fellow for his leadership in
leading-edge integrated circuit technologies covering IC &
Packaging. He was also a recipient of IBM Watson Research Division
Award for his contributions on advanced packaging. Dr. Tong received
his Ph.D., M.S. and M. Ph. degrees from Columbia University, and his
B.S. degree from National Taiwan University, all in engineering. He
has authored/co-authored 139 patents, 100+ technical publications,
and three books on electronic packaging.
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Plenary Session 2
|
Nanoelectronics Devices:More CMOS, Fusion CMOSand Beyond
CMOS
Hisatsune Watanabe (Semiconductor Leading Edge
Technologies, Inc.) |
Hisatsune Watanabe received the B.E. and M.E. degrees from
Waseda University. He received doctor degree from Nagoya university.
In 1971 he joined NEC Corporation, where he was in charge of
semiconductor development for microwave, optical devices and Si-LSI.
He was engaged of Fundamental Research Laboratories and
Microelectronics Research Laboratories, and associate Senior Vice
President of NEC Corporation, responsible management of NEC R&D
group. He became President of NEC Paten Service Corporation. Since
2005, he is president of Selete (Semiconductor Leading Edge
Technologies, Inc.) Currently, he is project leader of Japanese
national project, MIRAI sponsored by NEDO and CREST by JST. He
chaired International Conference on Solid State Devices and
Materials in 1999 (SSDM99). He is Vice Chairperson of International
Conference of Physics of Semiconductors in 2000. He is Chairperson
of IEEE EDS Tokyo chapter since 1997. He is Chairperson of ISSCC Far
East Program Committee in 2000-2002.
Plenary Session 3
|
Weak
Inversion for Ultra Low-Power and Very Low-Voltage Circuits
Eric Vittoz (Swiss Federal Institute of Technology,
Lausanne) |
Eric A. Vittoz received his Ph.D. degree from the Swiss Federal
Institute of Technology, Lausanne, Switzerland (EPFL) in 1969. He
was engaged in early developments of electronic watches since 1962
in CEH, where he was appointed Vice-Director in 1971. Since 1984, he
has been with CSEM (Swiss Center of Electronics and Microtechnology)
were he was Executive Vice-President, Advanced Microelectronics
until 1999. He is now fully retired from CSEM, after a partial
retirement as a Chief Scientist. He was also professor at EPFL, has
authored or co-authored more than 150 papers on low power circuit
design and analog VLSI processing and holds 26 patents. A Life
Fellow of IEEE, he was the recipient of the 2004 IEEE Solid-State
Circuits Award.
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